Npct750 Datasheet -
The NPCT750 belongs to Nuvoton’s advanced line of Trusted Platform Modules. It fully complies with the Trusted Computing Group (TCG) TPM 2.0 standard.
+--------------------------------------------------------+ | Nuvoton NPCT750 Architecture | +--------------------------------------------------------+ | [Host Interface] | | │── SPI / I2C (Up to 33 MHz clocking) | | ▼ | | [Core Logic Processing] | | ├── 32-bit Embedded RISC Core | | └── Cryptographic Agility Controller | | ▼ | | [Hardware Accelerators] | | ├── Asymmetric: RSA (2048-bit), ECC (P-256) | | ├── Symmetric: AES (128/256-bit) | | └── Hashing: SHA-1, SHA-256 | | ▼ | | [Storage & Entropy] | | ├── Non-Volatile Storage (NVRAM) | | └── True Random Number Generator (TRNG) | +--------------------------------------------------------+
: An international standard for computer security certification, ensuring a high level of assurance in the chip's security functions. TCG Certified npct750 datasheet
The NPCT750 serves as a cryptographic coprocessor, handling sensitive tasks like key generation and platform integrity measurement.
Master Out, Slave In. Receives commands and data payload from the host. The NPCT750 belongs to Nuvoton’s advanced line of
During the pre-boot phase, the UEFI initializes the SPI controller, verifies the presence of the NPCT750, and performs the TPM2_Startup command sequence.
The NPCT750 datasheet highlights an advanced hardware architecture optimized for low power consumption, high cryptographic throughput, and robust physical security. Cryptographic Subsystem TCG Certified The NPCT750 serves as a cryptographic
IBM’s Rainier server platform, used in the OpenBMC project, integrates the NPCT750A device on the 13th I²C bus. The device tree inclusion proves that the NPCT750 is fully compatible with the standard tcg,tpm-tis-i2c driver, demonstrating its suitability for large‑scale server deployments.